IRF9540NS/l l advanced process technology l surface mount (irf9540s) l low-profile through-hole (irf9540l) l 175c operating temperature l fast switching l p-channel l fully avalanche rated s d g absolute maximum ratings the d 2 pak is a surface mount power package capable of accommodating die sizes up to hex-4. it provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. the d 2 pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0w in a typical surface mount application. the through-hole version (irf9540l) is available for low- profile applications. description v dss = -100v r ds(on) = 0.117 w i d = -23a parameter typ. max. units r q jc junction-to-case CCC 1.1 r q ja junction-to-ambient ( pcb mounted,steady-state)** CCC 40 thermal resistance c/w parameter max. units i d @ t c = 25c continuous drain current, v gs @ -10v ? -23 i d @ t c = 100c continuous drain current, v gs @ -10v ? -16 a i dm pulsed drain current ?? -76 p d @t a = 25c power dissipation 3.8 w p d @t c = 25c power dissipation 140 w linear derating factor 0.91 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy ?? 430 mj i ar avalanche current ? -11 a e ar repetitive avalanche energy ? 14 mj dv/dt peak diode recovery dv/dt ?? -5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c to-263 to-262 www.kersemi.com 1 2014-8-38
IRF9540NS/l ? starting t j = 25c, l = 7.1mh r g = 25 w , i as = -11a. (see figure 12) ? repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) notes: ? i sd -11a, di/dt -470a/s, v dd v (br)dss , t j 175c ? pulse width 300s; duty cycle 2%. ? uses irf9540n data and test conditions source-drain ratings and characteristics parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage -100 CCC CCC v v gs = 0v, i d = -250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC -0.11 CCC v/c reference to 25c, i d = -1ma ? r ds(on) static drain-to-source on-resistance CCC CCC 0.117 w v gs = -10v, i d = -11a ? v gs(th) gate threshold voltage -2.0 CCC -4.0 v v ds = v gs , i d = -250a g fs forward transconductance 5.3 CCC CCC s v ds = -50v, i d = -11a ? CCC CCC -25 a v ds = -100v, v gs = 0v CCC CCC -250 v ds = -80v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 v gs = 20v gate-to-source reverse leakage CCC CCC -100 na v gs = -20v q g total gate charge CCC CCC 97 i d = -11a q gs gate-to-source charge CCC CCC 15 nc v ds = -80v q gd gate-to-drain ("miller") charge CCC CCC 51 v gs = -10v, see fig. 6 and 13 ?? t d(on) turn-on delay time CCC 15 CCC v dd = -50v t r rise time CCC 67 CCC i d = -11a t d(off) turn-off delay time CCC 51 CCC r g = 5.1 w t f fall time CCC 51 CCC r d = 4.2 w, see fig. 10 ? between lead, CCC CCC and center of die contact c iss input capacitance CCC 1300 CCC v gs = 0v c oss output capacitance CCC 400 CCC pf v ds = -25v c rss reverse transfer capacitance CCC 240 CCC ? = 1.0mhz, see fig. 5 ? electrical characteristics @ t j = 25c (unless otherwise specified) i gss ns i dss drain-to-source leakage current nh 7.5 l s internal source inductance parameter min. typ. max. u nits conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC -1.6 v t j = 25c, i s = -11a, v gs = 0v ? t rr reverse recovery time CCC 150 220 ns t j = 25c, i f = -11a q rr reverse recovery charge CCC 830 1200 nc di/dt = -100a/s ?? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) a s d g -23 -76 www.kersemi.com 2 2014-8-38
fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 1 10 100 0.1 1 10 100 d ds 20s pulse w idth t = 25c c a -i , drain-to-source current (a) -v , drain-to-source voltage (v) vgs top - 15v - 10v - 8.0v - 7.0v - 6.0v - 5.5v - 5.0v bottom - 4.5v -4.5v 1 10 100 0.1 1 10 100 d ds a -i , drain-to-source current (a) -v , drain-to-source volta g e ( v ) vgs top - 15v - 10v - 8.0v - 7.0v - 6.0v - 5.5v - 5.0v bottom - 4.5v -4.5v 20 s pulse w idth t = 175c c 0.1 1 10 100 45678910 t = 25c j gs d a -i , drain-to-source c urrent (a) -v , gate-to-source voltage (v) v = -25v 20s pulse w idth ds t = 175c j 0.0 0.5 1.0 1.5 2.0 2.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 j t , junction temperature (c) r , drain-to-source o n resistance ds(on) (normalized) a v = -10v gs i = -19a d IRF9540NS/l www.kersemi.com 3 2014-8-38
fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 500 1000 1500 2000 2500 3000 1 10 100 c, capacitance (pf) a ds -v , drain-to-source volta g e ( v ) v = 0v , f = 1mhz c = c + c , c shorted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0 4 8 12 16 20 0 20406080100 g gs a -v , gate-to-source voltage (v) q , total g ate char g e ( nc ) v = -80v v = -50v v = -20v ds ds ds for test circuit see figure 13 i = -11a d 0.1 1 10 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 t = 25c j v = 0v gs sd sd a -i , reverse drain current (a) -v , source-to-drain voltage (v) t = 175c j 1 10 100 1000 1 10 100 1000 ope ration in this area limite d by r ds(on) 10ms a -i , drain current (a) -v , drain-to-source volta g e ( v ) ds d 100s 1ms t = 25c t = 175c sin g le pulse c j IRF9540NS/l www.kersemi.com 4 2014-8-38
fig 10a. switching time test circuit fig 10b. switching time waveforms fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature v ds -10v pulse width 1 s duty factor 0.1 % r d v gs v dd r g d.u.t. + - v ds 90% 10% v gs t d(on) t r t d(off) t f 25 50 75 100 125 150 175 0 5 10 15 20 25 t , case temperature ( c) i , drain current (a) c d 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) IRF9540NS/l www.kersemi.com 5 2014-8-38
fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current q g q gs q gd v g charge -10v d.u.t. v ds i d i g -3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v ( br ) dss i as r g i as 0.01 w t p d.u.t l v ds v dd driver a 15v -20v 0 200 400 600 800 1000 1200 25 50 75 100 125 150 175 j e , single pulse avalanche energy (m j) as a startin g t , junction temperature ( c ) i top -4.7a -8.1a bo tto m -11a d IRF9540NS/l www.kersemi.com 6 2014-8-38
peak diode recovery dv/dt test circuit p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - ? ? ? r g v dd dv/dt controlled by r g i sd controlled by duty factor "d" d.u.t. - device under test d.u.t * circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? * reverse polarity of d.u.t for p-channel v gs [ ] [ ] *** v gs = 5.0v for logic level and 3v drive devices [ ] *** fig 14. for p-channel hexfets IRF9540NS/l www.kersemi.com 7 2014-8-38
d 2 pak package outline d 2 pak part marking information 10.16 (.400) re f. 6.47 (.255) 6.18 (.243) 2.61 (.103) 2.32 (.091) 8.89 (.350) r e f. - b - 1.32 (.052) 1.22 (.048) 2.79 (.110) 2.29 (.090) 1.39 (.055) 1.14 (.045) 5.28 (.208) 4.78 (.188) 4.69 (.185) 4.20 (.165) 10.54 (.415) 10.29 (.405) - a - 2 1 3 15.49 (.610) 14.73 (.580) 3x 0.93 (.037) 0.69 (.027) 5.08 (.200) 3x 1.40 (.055) 1.14 (.045) 1.78 (.070) 1.27 (.050) 1.40 (.055) m ax. notes: 1 dimensions after solder dip. 2 dimensioning & tolerancing per ansi y14.5m, 1982. 3 controlling dimension : inch. 4 heatsink & lead dimensions do not include burrs. 0.55 (.022) 0.46 (.018) 0.25 (.010) m b a m minimum recommended footprint 11.43 (.450) 8.89 (.350) 17.78 (.700) 3.81 (.150) 2.08 (.082) 2x lead assignments 1 - ga te 2 - d r ain 3 - s ou rc e 2.54 (.100) 2x part number logo date code (yyw w ) yy = year ww = week assembly lot code f530s 9b 1m 9246 a IRF9540NS/l www.kersemi.com 8 2014-8-38
package outline to-262 outline to-262 part marking information IRF9540NS/l www.kersemi.com 9 2014-8-38
tape & reel information d 2 pak 3 4 4 trr feed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl feed direction 10.90 (.42 9) 10.70 (.42 1) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.06 3) 1.50 (.05 9) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) min . 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge. IRF9540NS/l www.kersemi.com 10 2014-8-38
|
